System and method for transmitting ultrawide bandwidth signals

ABSTRACT

A method is provided for generating a multiple band ultrawide bandwidth signal. In this method, an ultrawide bandwidth devices provides a first reference signal having a first reference frequency, and a second reference signal having a second reference frequency that is different from the first reference frequency. The device generates a first ultrawide bandwidth signal based on the first reference signal, and a second ultrawide bandwidth signal based on the second reference signal, creating two separate frequency bands. These two signals can be generated form the same base clock signal, allowing for significantly simpler implementation and modification.

CROSS-REFERENCE TO RELATED PATENT DOCUMENTS

This application relies for priority on U.S. provisional applicationSer. No. 60/450,314, by Richard D. Roberts et al., filed Feb. 28, 2003,entitled “ULTRAWIDE BANDWIDTH FREQUENCY PLAN FOR JAPAN” and U.S.provisional application Ser. No. 60/452,016, by Richard D. Roberts etal., filed Mar. 6, 2003, entitled “WIRELESS COMMUNICATIONS SYSTEM ANDMETHOD OF OPERATING THE SAME,” the contents of both of which are herebyincorporated by reference in their entirety.

FIELD OF THE INVENTION

The present invention relates in general to wireless communicationsystems, such as ultra-wide band (UWB) systems, including mobiletransceivers, centralized transceivers, and related equipment. Morespecifically the present invention relates to the transmission of databetween two wireless devices using multiple frequency bands.

BACKGROUND OF THE INVENTION

As the need for wireless devices increases, wireless UWB implementationsare increasingly turned to meet this need. A UWB radio can provide afast, low power transmission scheme. UWB signals generally have acontinuous fractional bandwidth (i.e., the ratio of the −10 dB bandwidthto the center frequency) of at least 25%. However, a signal can falloutside of this basic range and still be considered “UWB.” For example,the Federal Communications Commission (FCC) refers to a signal in the3.1 to 10.6 GHz range with a center frequency of 500 MHz as UWB. Thus,the above measurement is just a rough guideline.

However, UWB devices suffer several important limitations. One of thebiggest of these limitations is the restrictions imposed on UWBtransmissions by the FCC. In February of 2002, the FCC issuedregulations regarding the use of UWB devices. These regulations imposedsignificant bandwidth and spectral power limits on any UWBtransmissions. They also limited the bandwidth available for UWBtransmission.

Another limitation in the United States is the presence of the UNII(Unlicensed National Information Infrastructure) band right in themiddle of the frequency band allocated to UWB. The FCC has allocated therange of 3.1 GHz to 10.6 GHz for UWB, and the UNII band falls in therange of 5.15 to 5.85 GHz. The UNII band is used by unlicensed devicessuch as cordless phones and 802.11a wireless local area network (WLAN)devices. Because of the high power levels permitted devices in the UNIIband (sometime up to one hundred times the power levels of UWBtransmissions), it is preferable for UWB devices to avoid transmittingin those bands.

Although the UNII band is offered as an example of a frequency band thata UWB device may wish to avoid, in some embodiments it may be desirableto avoid other frequency bands.

Furthermore, as the circumstances change, these restrictions may beincreased or decreased, reducing or expanding the bandwidth availablefor UWB transmissions.

In addition, although UWB devices in the United States must meet therestrictions imposed by the FCC and preferably avoid the UNII band,these parameters will not apply in other countries. And though no othercountry has as yet regulated UWB transmissions, it seems likely thatthey will impose power and bandwidth restrictions as the FCC has done inthe United States. However, it seems equally likely that the specificparameters of these restrictions will not track exactly with theparameters of the restrictions imposed by the FCC.

Furthermore, other countries and regions are likely to have someequivalent to the UNII band, i.e., a band dedicated to cordless phonesand WLANs, with varying locations and bandwidth in the availablefrequency spectrum. For example, the Japanese equivalent of the UNIIband falls between 4.90 to 5.4 GHz. UWB devices operating in theseregions may wish to avoid these frequency bands as well.

Therefore, it would be desirable to provide a UWB device that would beeasily modified to broadcast using different bandwidths and differentcenter frequencies. This would allow the device to account for changesin available spectrum over the course of time, and in differentjurisdictions.

It would also be desirable to provide a device that uses all of theavailable UWB bandwidth, but still avoids certain sensitive bandslocated within that available bandwidth.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying figures, where like reference numerals refer toidentical or functionally similar elements throughout the separate viewsand which together with the detailed description below are incorporatedin and form part of the specification, serve to further illustratevarious embodiments and to explain various principles and advantages inaccordance with the present invention.

FIG. 1 is a block diagram of an ultra-wide band transceiver according toa preferred embodiment of the present invention;

FIG. 2 is a block diagram of a circuit for generating a single-band UWBsignal, according to a preferred embodiment of the present invention;

FIG. 3 is a graph showing the frequency response of an ultra-wide bandsignal produced by the circuit of FIG. 2 according to a first preferredembodiment of the present invention;

FIG. 4 is a graph showing the frequency response of an ultra-wide bandsignal produced by the circuit of FIG. 2 according to a second preferredembodiment of the present invention;

FIG. 5 is a block diagram of a circuit for generating a dual-band UWBsignal, according to a preferred embodiment of the present invention;

FIG. 6 is a frequency graph of the output of the circuit of FIG. 5 in alow band mode, according to preferred embodiments of the presentinvention;

FIG. 7 is a frequency graph of the output of the circuit of FIG. 5 in ahigh band mode, according to preferred embodiments of the presentinvention;

FIG. 8 is a frequency graph of the output of the circuit of FIG. 5 in adual-band mode, according to preferred embodiments of the presentinvention;

FIG. 9 is a diagram showing a multiple network design using bothfrequency division multiplexing and code division multiplexing,according to a preferred embodiment of the present invention;

FIG. 10 is a block diagram of a circuit for generating a single ordual-band UWB signal, according to a preferred embodiment of the presentinvention;

FIG. 11 shows an alternate embodiment of the wavelet code generator pathaccording to a preferred embodiment of the present invention; and

FIG. 12 is a block diagram of a circuit for generating a single-band UWBsignal, according to another preferred embodiment of the presentinvention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 1 is a block diagram of an ultra-wide band (UWB) transceiveraccording to a preferred embodiment of the present invention. As shownin FIG. 1, the transceiver includes three major components, a receiver110, a transmitter 120, and a radio controller and interface 130. Thereceiver 110 is attached to a receiving antenna 112, and includes afront end 114, a UWB waveform correlator 116, and a receiving timinggenerator 118. The transmitter is attached to a transmitting antenna122, and includes a UWB waveform generator 124, an encoder 126, and atransmitting timing generator 124.

Although a single radio controller and interface 130 is shown servicingboth the receiver 110 and transmitter 120, alternate embodiments couldinclude a separate radio controller and interface 130 for each of thereceiver 110 and transmitter 120. In addition, a single antenna that isswitched between transmitting and receiving may be used in place of theseparate receiving and transmitting antennas 112 and 122. The receivingand transmitting timing generators 118 and 128 may also be combined intoa single timing generator or may be maintained as separate units.

The radio controller and interface 130 is preferably a processor-basedunit that is implemented either with hard wired logic, such as in one ormore application specific integrated circuits (ASICs) or in one or moreprogrammable processors. In operation, the radio controller andinterface 130 either serves as a medium access control (MAC) controlleror serves as a MAC interface between the UWB wireless communicationfunctions implemented by the receiver 110 and transmitter 120 andapplications that use the UWB communications channel for exchanging datawith remote devices.

When the transceiver is receiving a signal, the receiving antenna 112converts an incoming UWB electromagnetic waveform into an electricalsignal (or optical signal) and provides this electrical signal to theradio front end 114. Depending on the type of waveform, the radio frontend 114 processes the electric signals so that the level of the signaland spectral components of the signal are suitable for processing in theUWB waveform correlator 116. This processing may include spectralshaping, such as a matched filtering, partial matched filtering, simpleroll-off, etc.

After front end processing, the UWB waveform correlator 116 thencorrelates the incoming signal with different candidate signalsgenerated based on a clocking signal from the timing generator 118 todetermine whether the receiver 110 is synchronized with the incomingsignal and if so, to determine the data contained in the receivedincoming signal.

The timing generator 118 operates under the control of the radiocontroller and interface 130 to provide a clocking signal CLK_(R) thatis used in the correlation process performed in the UWB waveformcorrelator 116. This clocking signal CLK_(R) has a phase that ispreferably varied with respect to the incoming signal received at thereceiving antenna 112. The UWB waveform correlator uses the clockingsignal CLK_(R) to locally generate a correlation signal that matches aportion of the incoming signal and has the phase of the clocking signalCLK_(R). When the locally-generated correlation signal (thelocally-generated signal) and the incoming signal are aligned with oneanother in phase, the UWB waveform correlator 116 provides highsignal-to-noise ratio (SNR) data to the radio controller and interface130 for subsequent processing.

Conceptually, the UWB waveform correlator 116 can be considered to havea correlation window containing the local signal. As the phase of theclocking signal is varied with respect to that of the incoming signal,the correlation window is shifted. The correlation window is thencompared to a snapshot of the incoming signal until an acceptablecorrelation result is obtained for the two signals, indicating that anacquisition lock has been achieved.

In some circumstances, the output of the UWB waveform correlator 116 isthe data itself. In other circumstances, the UWB waveform correlator 116simply provides an intermediate correlation result, which the radiocontroller and interface 130 uses to determine the data and determinewhen the receiver 110 is synchronized with the incoming signal.

The UWB waveform correlator 116 operates in two modes of operation, asignal track mode (“track mode”) and a signal acquisition mode(“acquisition mode”). The acquisition mode is used when synchronizationeither has not occurred or has been lost, and the receiver 110 isworking to achieve such synchronization. The track mode is used whensynchronization has occurred and needs to be maintained.

During the acquisition mode, the radio controller and interface 130provides a control signal to the receiver 110 to acquiresynchronization. This control signal instructs the receiver 110 to slidethe correlation window within the UWB waveform correlator 116 to try andmatch the phase of the incoming, signal and achieve an acquisition lock.In particular, this is achieved by adjusting the phase and frequency ofthe clock output from the timing generator 118 until a desirablecorrelation result is obtained.

Once synchronized, the receiver enters the track mode. During the trackmode, the transceiver operates to maintain and improve synchronization.In particular, the radio controller and interface 130 analyzes thecorrelation result from the UWB waveform correlator 116 to determinewhether the correlation window in the UWB waveform correlator 116, i.e.,the phase of the local signal from the timing generator, needs to beadjusted.

In addition, during track mode, the receiver 110 provides data to aninput port (“RX Data In”) of the radio controller and interface 130,which in turn provides this data to an external process, via an outputport (“RX Data Out”). The external process may be any one of a number ofprocesses performed with data that is either received via the receiver110 or is to be transmitted via the transmitter 120 to a remotereceiver.

When the transceiver is transmitting a signal, the radio controller andinterface 130 receives source data at an input port (“TX Data In”) froman external source. The radio controller and interface 130 then appliesthe data to the encoder 126 of the transmitter 120 via an output port(“TX Data Out”). The radio controller and interface 130 also providescontrol signals to the transmitter 120 for use in identifying thesignaling sequence of UWB pulses. As noted above, in some embodiments ofthe present invention, the receiver 110 and the transmitter 120functions may use joint resources, e.g., a common timing generatorand/or a common antenna.

The encoder 126 receives user coding information and data from the radiocontroller and interface 130 and preprocesses the data and coding so asto provide a timing input for the UWB waveform generator 124. The UWBwaveform generator 124 in turn produces UWB pulses encoded in shapeand/or time to convey the data to a remote location. The encoder 126performs this function in accordance with a timing signal CLK_(T)received from the transmitting timing generator 128.

The encoder 126 produces the control signals necessary to generate therequired modulation. For example, the encoder 126 may take a serial bitstream and encode it with a forward error correction (FEC) algorithm(e.g., such as a Reed Solomon code, a Golay code, a Hamming code, aConvolutional code, etc.). The encoder 126 may also interleave the datato guard against burst errors. The encoder 126 may also apply awhitening function to prevent long strings of “ones” or “zeros.” Theencoder 126 may also apply a user specific spectrum spreading function,such as generating a predetermined length chipping code (also called acode word) that is sent as a group to represent a bit (e.g., invertedfor a “one” bit and non-inverted for a “zero” bit, etc.). The encoder126 may divide the serial bit stream into subsets in order to sendmultiple bits per wavelet or per chipping code, and generate a pluralityof control signals in order to affect any combination of desiredmodulation schemes.

The radio controller and interface 130 may provide some identification,such as user ID, etc., of the source from which the data on the inputport (“TX Data In”) is received. In one embodiment of the presentinvention, this user ID may be inserted in the transmission sequence, asif it were a header of an information packet. In other embodiments ofthe present invention, the user ID itself may be employed to encode thedata, such that a receiver receiving the transmission would need topostulate or have a priori knowledge of the user ID in order to makesense of the data. For example, the ID may be used to apply a differentamplitude signal (e.g., of amplitude “f”) to a fast modulation controlsignal as a way of impressing the encoding onto the signal.

The output from the encoder 126 is applied to the UWB waveform generator124, which then produces a sequence of UWB wavelet shapes at wavelettimes according to the command signals it receives from the encoder 126.These wavelet shapes may be prepared based on one of any number ofdifferent schemes. The output from the UWB generator 124 is thenprovided to the transmitting antenna 40, which then transmits the UWBenergy to a receiver.

Preferably the data is encoded into the signal by exploiting the shapeof the wavelets. In particular, the data is preferably encoded bybi-phase modulating a series of wavelets arranged according to a binaryor ternary chipping code provided by the encoder 126. (A ternary code isused in the preferred embodiment.)

In the preferred embodiment the wavelets used are three consecutivecycles of an oscillating signal, e.g., a sinusoidal waveform. Inalternate embodiments, however, this could be altered. The number ofcycles could be increased or decreased; the type of oscillating signalcould be changed; or a differently shaped waveform could be usedaltogether, such as a Gaussian monopulse, or the like.

As noted above, the chipping codes, or code words, are strings ofindividual wavelets that are modulated according to a set pattern. In apreferred embodiment length 12 and 24 ternary code words are used. Inother words, each bit is represented by a bi-phase modulated code word,and each code word is represented by a string of 12 or 24 waveletsmodulated in a ternary fashion according to a set pattern, e.g., aternary pattern in the preferred embodiment. For example, a particulartransmission might use a length 12 code word as follows: 0 −1 −1 −1 1 11 −1 1 1 −1 1. In this case, 12 consecutive wavelets are modulatedaccording to this code to create a code word, i.e., the first waveletremains unchanged, the second wavelet is inverted, the third wavelet isnulled, the forth wavelet is nulled etc. This code word is then used torepresent one value of a bit of data, and its inverse is used torepresent the other value of a bit of data.

The code words used could vary according to network, device, or even bytransmission. In addition, though code words of length 12 and 24 arepreferable in the present embodiment, other code word lengths can bechosen as desired.

Generating a Single Band UWB Signal

FIG. 2 is a block diagram of a circuit for generating a single-band UWBsignal, according to a preferred embodiment of the present invention. Asshown in FIG. 2, the signal-generating circuit includes a code wordgenerator 205, a first mixer 210, a band pass filter 215, a second mixer220, an antenna 225, a reference frequency clock 230, a xN phase-lockedloop (PLL) circuit 235, a divide-by-K circuit 240, a bit source 245, anda xM PLL circuit 250. In this embodiment, the circuit uses a repetitionof multiple cycles of an oscillating signal as a UWB wavelet.

The reference frequency clock 230 generates a reference signal that willbe used by the rest of the circuit. In the preferred embodiment thereference signal is a sinusoidal waveform with a frequency of 684 MHz,though this could be changed in frequency and waveform in alternateembodiments.

In general, the reference signal can have frequency that varies greatly.It could be a very low frequency signal, lower than the center frequencyof the lowest band in use, or it could be a very high frequency signal,having a frequency that is as high is higher than the highest band inuse. In particular the reference signal preferably has a frequency thatcorresponds to a value in a center frequency band for the signalgenerated by the device. This can mean that the reference signal'sfrequency is within a range of the center frequency of the signal, thatthe reference signal's frequency is equal to the center frequency of thesignal, that the reference signal's frequency is an N times the centerfrequency of the signal, that the reference signal's frequency is 1/Ntimes the center frequency of the signal, or the like, where N is aninteger. Preferably the reference frequency is in the range of 300 MHzto 9.2 GHz, though values outside of that range can be used in someembodiments. In particular, as the speed of devices increases,correspondingly faster reference frequencies can be used. Specificvalues that are used for the frequency of the reference signal inpreferred embodiments include 684 MHz, 1.368 GHz, 2.376 GHz, 4.104 GHz,5.4 GHz, and 8.208 GHz.

The xN PLL 235 multiplies the reference frequency of the referencesignal by N and provides a signal with this new frequency as a clockingsignal to the code word generator 205. In the preferred embodiment N=2,so the xN PLL 235 provides a clocking signal to the code word generator205 that is twice the reference frequency (i.e., 1.368 GHz). However,the value of N could be changed in alternate embodiments to account fordifferent code word lengths and/or spectral bands (specified by centerfrequency and bandwidth).

The code word generator 205 provides a length L code word used torepresent bits of data. The rate at which individual elements of thecode word (called chips) are output is equal to the frequency of theclocking signal provided from the xN PLL 235. This rate can be calledthe chipping rate of the code word generator 205. In the preferredembodiment L=24 and the chipping rate is 1.368 GHz, though theseparameters could be changed in alternate embodiments. One preferredalternate embodiment uses a code word length of L=12.

The divide-by-K circuit 240 divides the frequency of the referencesignal by K and provides a signal with this new frequency as a clockingsignal to the bit source 245. In the preferred embodiment K=12, so thedivide-by-K circuit 240 provides a clocking signal to the bit source 245that is one twelfth the reference frequency (i.e., 57 MHz). However, thevalue of K could be changed in alternate embodiments to any value(preferably an integer) to account for different data rates.

The product of the value of N for the xN PLL 235 and the value of K forthe divide-by-K circuit 240 should be equal to the length L of the codeword generated by the code word generator 205, i.e., L=(N×K). Althoughthe value of N and the value of K may vary in alternate embodiments, theequality between their product and the code word length should bemaintained.

The bit source 245 provides the bits of data that need to be sent by thedevice. This can be any sort of desired data source, so long as itprovides bit data. The rate at which bits are output is equal tofrequency of the clocking signal provided from the divide-by-K circuit240. This rate can be called the symbol rate of the bit source 445. Agiven symbol is made up of P bits, where P is an integer greater than 0.Thus, the bit source 445 outputs P bits each time the clocking signalprovided from the divide-by-K circuit 240 cycles. In the preferredembodiment P is 1 and the symbol rate is 57 Ms/s, though these valuescould be changed in alternate embodiments.

The first mixer 210 multiplies the output of the code word generator 205with the output of the bit source 245. Because the clocking signalprovided to the bit source 245 is

$\frac{1}{N \cdot K} = \frac{1}{L}$times the frequency of the clocking signal provided to the code wordgenerator 205, the value of P bits are held for the duration of anentire code word (i.e., for the duration of L wavelets). Thus, the firstmixer serves to modulate the code word generated by the code wordgenerator 205 with the data bits provided by the bit source 245.

The xM PLL 250 multiplies the frequency of the reference signal by M andprovides a signal with this new frequency as a clocking signal as aclocking signal to the second mixer 220. In the preferred embodimentM=6, so the xM PLL 250 provides a clocking signal to the code wordgenerator 205 that is six times the reference frequency (i.e., 4.104GHz). However, the value of M could be changed in alternate embodimentsto account for different code word lengths.

The value of M divided by the value of N is equal to the number ofcycles of the reference signal that are used to form each wavelet of theUWB signal used by the circuit of FIG. 2. In this embodiment eachwavelet is made up of three cycles of the reference signal, so M=6(i.e.,

$\frac{M}{N} = {\frac{6}{2} = 3}$cycles per wavelet). As the number of cycles per wavelet changes, so toowill the value of M.

The second mixer 220 mixes the output of the xM PLL 250 and the outputof the first mixer 210. This has the effect of mixing the UWB waveletsgenerated at the xM PLL 250 with the data-modulated code word outputfrom the first mixer 210, to create a final UWB signal stream. Becausethe frequency of the signal output from the xM 250 PLL is

$\frac{M}{N}$(i.e., 3 in the preferred embodiment) times the frequency provided tothe code word generator, the xM PLL 250 will provide 3 cycles of itssignal for every element of the code word, thus generating 3-cyclewavelets.

The band pass filter 215 serves to ensure that the transmitted energy iswithin the proper band. A similar band pass filter can be used in thereceiver to protect the received signal from interference from otherbands.

The transmitted waveform preferably has a center frequency equal to thereference frequency multiplied by M, i.e., 4.104 GHz in the preferredembodiment, and a −3 dB bandwidth equal to the reference frequencymultiplied by N, i.e., 1.368 GHz in the preferred embodiment.

The band pass filter 215 preferably has a center frequency equal to thereference frequency multiplied by M, e.g., 4.104 GHz in a preferredembodiment, and lower and upper cutoff frequencies that define thedesired operational band, e.g. upper and lower 20 dB cutoff frequenciesof 3.1 GHz and 5.1 GHz, respectively, in a preferred embodiment. Thisgives a −20 dB bandwidth of about 2.0 GHz. This value is preferablychosen to give a response comparable to the −3 dB bandwidth, which makesthe values of the cutoff frequencies used by the band pass filter 215linearly related to the upper and lower −3 dB bandwidth limits, and soproportional to the reference frequency. Thus, they are easy tocalculate.

Of course, the various parameters for reference frequency, bandwidth,and circuit coefficients can vary in alternate embodiments.

The antenna 225 is configured to transmit the signal provided from thesecond mixer 220.

In alternate embodiments one of the xN PLL 235, the divide-by-K circuit240, and the xM PLL 250 could be eliminated if the reference frequencywere chosen accordingly. In addition, some of the PLLs could be replacedwith frequency dividers and vice versa. In this way, any one of the codeword generator 205, the bit source 245, and the second mixer 220 couldreceive the output of the reference frequency clock 230 directly.However, each of these three elements preferably receives a clockingsignal that either is the reference signal or is derived from thereference signal.

Also, although FIG. 2 discloses the use of PLL circuits for all of themultiplying circuits, alternate embodiments could use other types ofmultipliers.

Furthermore, although FIG. 2 discloses the use of a band pass filter 215after the second mixer 220, alternate embodiments could replace thefunctionality of the band pass filter 215 with a low pass filter locatedimmediately before the second mixer 220. This low pass filter wouldpreferably have a center frequency equal to the reference frequencymultiplied by M, i.e., 4.104 GHz in the preferred embodiment

As a result of this circuit design, the frequency response of thecircuit of FIG. 2 can be modified relatively easily by simply changingthe reference frequency clock 230, and altering the parameters of theband pass filter 215 to account for this change. In particular, the bandpass filter 215 is changed by altering its center frequency and itsupper and lower cutoff points. These cutoff points can be set accordingto any of a variety of criteria, but using a −10 dB point (i.e., thepoint at which the strength of the signal is down 10 dB) or a −20 dBpoint (i.e., the point at which the strength of the signal is down 20dB) are preferred criteria.

The bandwidth of the band pass filter 215 is preferably proportional tothe reference frequency, though the exact proportion will depend uponwhat particular cutoff point is used. A −3 dB cutoff frequency should be

${\pm \frac{f_{R}{NR}}{2}} = {{\pm 684}\mspace{14mu}{MHz}}$in the preferred embodiment. Other cutoff frequencies can beextrapolated.

Further modifications (e.g., to the code word length, the chippinglength, or the number of cycles per wavelet) can be made simply bymodifying the parameters K, L, M, and N. Changes to the chipping lengthor the number of cycles per wavelet will affect the frequency responseof the resulting waveform, so the parameters of the band pass filter 215should be adjusted accordingly.

FIG. 3 is a graph showing the frequency response of a UWB signalproduced by the circuit of FIG. 2 according to a first preferredembodiment of the present invention, and FIG. 4 is a graph showing thefrequency response of a UWB signal produced by the circuit of FIG. 2according to a second preferred embodiment of the present invention.

In the circuit of FIG. 3, the frequency of the reference signal and thecenter frequency of the band pass filter 215 are both chosen to be 684MHz, K is 12, L is 24, M is 6, and N is 2, and the −20 dB bandwidth ofthe band pass filter is about 2 GHz. This provides a signal that caneasily avoid UNII band in the United States.

In the circuit of FIG. 4, the frequency of the reference signal and thecenter frequency of the low pass filter 215 are both chosen to be 666MHz, K is 12, L is 24, M is 6, and N is 2, and the −20 dB bandwidth ofthe band pass filter is about 1.8 GHz. This provides a signal that caneasily avoid the Japanese equivalent of the U.S. UNII band, which is setat 4.90 TO 5.4 GHz.

FIGS. 3 and 4 graphically show how easily the frequency response of thecircuit of FIG. 2 can be modified by altering the frequency of thereference signal generated by the reference frequency clock 230, and theparameters of the band pass filter 215.

FIG. 12 is a block diagram of a circuit for generating a single-band UWBsignal, according to another preferred embodiment of the presentinvention. As shown in FIG. 12, the signal generating circuit includesan I/Q oscillator 1205, a lookup table 1210 first and second DACcircuits 1212 and 1214, a vector modulator 1220, a clocking signalgenerator 1225, a bit sources 1230, a wavelet code generators 1240, aswitch 1295, a xN circuit 1297, and a selecting circuit 1299. It alsomay comprise first and second band pass filters 1280 and 1285.

The wavelet code generator 1240 further comprises an encoder 1250 and amixer 1270. This embodiment of the clocking signal generator furthercomprises a xM circuit 1222 and a divide-by-L circuit 1227.

The I/Q oscillator 1205 produces an oscillating signal at an oscillatingfrequency. In the preferred embodiments, the I/Q oscillator comprises avoltage controlled oscillator/phase locked loop (VCO/PLL) that providesa first in-phase and quadrature phase (I/Q) signal.

The lookup table (LUT) 1210 contains data necessary to create sine andcosine waves of varying phase. It is controlled by a phase controlsignal, which instructs the lookup table 1210 to output the datacorresponding the sine/cosine value for that phase. These digital sineand cosine signals are each output at one of the I and Q outputs of thelookup table 1210.

The digital sine and cosine signals are received at the first and secondDAC circuits 1212 and 1214, which convert the digital sine and cosinesignals into analog sine and cosine signals, These analog sine andcosine signals are output at the I and Q outputs of the DAC circuits1212 and 1214 as a second I/Q signal.

The vector modulator 1220 accepts the first I/Q signal from the I/Qoscillator 1205 and the second I/Q signal from the first and second DACcircuits 1212 and 1214, and produces a base clocking signal. This baseclocking signal has a base clock frequency close to the oscillatingfrequency (e.g., ±10%), but is varied in phase and frequency based onthe value and rate of change of the second I/Q signal.

The clocking signal generator 1225 provides clocking signals to the bitsource 1230 and the wavelet code generator 1240. In the disclosedembodiment, the clocking signal generator 1225 provides a bit rateclock, a chip rate clock, and a wavelet center frequency clock. Inparticular, the clocking signal generator 1225 passes the base clockdirectly as the chip rate clock, passes the base clock through the xMcircuit 1222 to provide a wavelet center frequency clock that has Mtimes the frequency of the base clock, and passes the base clock throughthe divide-by-L circuit to provide a bit rate clock that is 1/L timesthe frequency of the base clock.

The bit source 1230 provides the wavelet code generator with a stream ofincoming bits. This can be accomplished through the use of an incomingbit stream signal and a data latch, or any other desired means ofproviding data bits. The bit rate clock instructs the bit source 1230 asto when it should cycle through bit values.

The wavelet code generator 1240 accepts bit data and converts them intoan ultrawide bandwidth signal having the bit values modulated into codewords. In particular, the encoder 1250 generates a code word that isupright or inverted based on the value of a received bit. The waveletcode generator 1240 generates a coded sequence of wavelets (i.e., chips)based on the chip rate clock. In a preferred embodiment a chip is aninverted or non-inverted wavelet, or could be a null (i.e., a missing orzero) wavelet. This could be altered in other embodiments, however.

In one preferred embodiment the encoder 1250 comprises a code wordgenerator and a mixer, as shown by elements 205 and 210 in FIG. 2 andelements 405A, 405B, 410A, and 410B in FIG. 5.

The mixer 1070 modulates the code words generated by the encoder 1050into wavelets, each chip in the code word being represented by one ormore wavelets (as determined the ratio of the chip rate clock andwavelet center frequency clock.

The first and second BPFs 1080 and 1085 serve to remove extraneousfrequency elements from the processed signals. Preferably theirparameters are determined as noted above with respect to the filtersused in the circuit of FIG. 2.

The first, second, and third switches 1291, 1293, and 1295 switch allowthe device to selectively choose whether use a first band or a secondband. The selecting circuit 1299 provides the signal to choose whichband to use. In an embodiment without the BPFs 1280 and 1285, the secondand third switches 1293 an 1295 can be eliminated as well.

In operation, if the selecting circuit selects the first band, the firstswitch 1291 will connect the output of the vector modulator 1230 to theclocking signal generator 1230, and the second and third switches 1293and 1295 will connect the wavelet code generator 1240 to the outputtransmit signal via the first BPF 1280. If, however, the selectingcircuit selects the second band, the first switch 1291 will connect theoutput of the xN circuit 1297 to the clocking signal generator 1230, andthe second and third switches 1293 and 1295 will connect the waveletcode generator 1240 to the output transmit signal via the second BPF1285. The xN circuit will provide the clocking signal generator 1230with an input signal with N times the frequency of the vector modulator1220.

In this embodiment, N is the ratio of the center frequencies of thefirst and second bands; M is the number of cycles in a wavelet; and L isthe code length used.

In this way, the circuit of FIG. 12 allows for two separate bands, butshares the same elements save for the switches 1291, 1293, and 1295, thexN circuit 1297, and the selecting circuit 1299. This allows for a verysmall device, and one that can be manufactured more cheaply than otherselective band devices.

Generating Multiple Bands

Alternate embodiments can use multiple frequency bands, however. FIG. 5is a block diagram of a circuit for generating a dual-band UWB signal,according to a preferred embodiment of the present invention. As shownin FIG. 5, the signal-generating circuit includes a first-band code wordgenerator 405A, a first-band first mixer 410A, a first-band band passfilter 415A, a first-band second mixer 420A, a first-band antenna 425A,a first-band xN₁ phase-locked loop (PLL) circuit 435A, a first-banddivide-by-K₁ circuit 440A, a first-band bit source 445A, a first-bandxM₁ PLL circuit 450A, second-band code word generator 405B, asecond-band first mixer 410B, a second-band band pass filter 415B, asecond-band second mixer 420B, a second-band antenna 425B, a second-bandxN₁ phase-locked loop (PLL) circuit 435B, a second-band divide-by-K₁circuit 440B, a second-band bit source 445B, a second-band xM₂ PLLcircuit 450B, and a reference frequency clock 430. The embodimentdisclosed in this circuit uses a repetition of multiple cycles of anoscillating signal as a UWB wavelet.

The elements in the signal-generating circuit of FIG. 5 operate liketheir counterparts in FIG. 2. However, the first band xN₁ PLL 435, thefirst-band divide-by-K₁ circuit 440A, and the a first-band xM₁ PLLcircuit 450A use parameters N₁, K₁, and M₁, respectively, while thesecond-band xN₂ PLL 435, the second-band divide-by-K₂ circuit 440A, andthe a second-band xM₂ PLL circuit 450A use parameters N₂, K₂, and M₂.These parameters must meet the following parameter:

$\frac{M_{1}}{N_{1}} = {\frac{M_{2}}{N_{2}}.}$In other words, both must use the same wavelet (i.e., the same number ofcycles per wavelet), though that wavelet is scaled to a differentfrequency in each band. In addition, although in the preferredembodiment both bands use the same code word length, i.e.,L=(N₁×K₁)=(N₂×K₂), alternate embodiments could use a different code wordlength for different bands. If the two bands use the same code wordlength, they can choose the same or different code word sets, asdesired.

In alternate embodiments one of the first band xN₁ PLL 435, thefirst-band divide-by-K₁ circuit 440A, the first-band xM₁ PLL circuit450A, the second-band xN₂ PLL 435, the second-band divide-by-K₂ circuit440A, and the a second-band xM₂ PLL circuit 450A could be eliminated ifthe reference frequency were chosen accordingly. In addition, some ofthe PLLs could be replaced with frequency dividers and vice versa. Inthis way, any one of the first-band code word generator 405A, thefirst-band bit source 445A, the first-band second mixer 420A,second-band code word generator 405B, the second-band bit source 445B,the second-band second mixer 420B could receive the output of thereference frequency clock 430 directly.

Although the circuit of FIG. 5 discloses separate first-band andsecond-band bit sources 445A and 445B, the two could be combined intoone. This combined bit source could either provide its data to one of aplurality of separate UWB signals, or could provide its data to multiplesignals, either sending the same data in multiple bands at the same timeto enhance successful transmission, or sending different data inmultiple bands at the same time to increase throughput.

Furthermore, although the circuit of FIG. 5 uses only two bands,alternate embodiments could be used that employ a greater number ofbands. To use additional bands, alternate embodiments can add additionalcopies of the circuitry of FIG. 2, adjust the various parameters of thecircuit to achieve the desired frequency response, and connect thatcircuit to the reference frequency clock 430.

FIGS. 6, 7, and 8 are frequency graphs of the output of the circuit ofFIG. 5 for different modes of operation, according to preferredembodiments of the present invention. FIG. 6 is a frequency graph of alow band mode; FIG. 7 is a frequency graph of a high band mode; and FIG.8 is a frequency graph of a dual-band mode.

In the embodiments shown in FIGS. 6, 7, and 8, L is 24, K₁ is 12, N₁ is2, M₁ is 6, K₂ is 6, N₂ is 4, and M₂ is 12, the reference frequency is684 MHz, the center frequency of the first-band band pass filter 415A is684 MHz, with an upper −20 dB cutoff of about 5.1 GHz, and a lower −20dB cutoff of about 5.1 GHz, and the center frequency of the second-bandband pass filter 415B is 1.368 GHz. Thus, the clock signal provided tothe first-band code word generator 405A is 1.368 GHz; the clock signalprovided to the first-band bit source 445A is 57 MHz; the clock signalprovided to the first-band second mixer 420A is 4.104 GHz; the clocksignal provided to the second-band code word generator 405B is 2.736GHz; the clock signal provided to the second-band bit source 445B is 114MHz; and the clock signal provided to the second-band second mixer 420Bis 8.208 GHz.

This gives a first band (i.e., the low band) with a code word length of24, a 3-cycle wavelet, a chipping rate of 1.368 GHz, and a symbol rateof 57 Ms/s, and a second band (i.e., the high band) with a code wordlength of 24, a 3-cycle wavelet, a chipping rate of 2.736 GHz, and asymbol rate of 114 Ms/s.

As shown in FIGS. 6, 7, and 8, the low band 610 is set between 3.1 and5.15 GHz, and the high band 710 is set between 5.825 GHz and 10.6 GHz.Both the low band 610 and the high band 710 in this embodiment arearranged so that they do not interfere with the UNII band 510. In analternate embodiment the low band 610 can be set between 3.5 and 4.6GHz, and the high band 710 can be set between 7.0 GHz and 9.2 GHz.

In general, different frequencies can be chosen based on a variety ofcriteria that include: the presence of interfering bands, desired datarates, power consumption restrictions, ease and cost of implementation,etc. For example, higher data rates are possible at higher frequencies,though cost and difficult of implementation will rise. Likewise,different frequency combinations will locate the resulting UWB signal ina particular place in the spectrum. This can be advantageous if thelocation of the signal remains in a part of the spectrum that avoidsstrong interfering bands. Regardless, the designs shown above in FIGS. 2and 5 allow these frequencies to be more easily changed to account forwhatever reasons a user might wish to change them.

FIG. 10 is a block diagram of a circuit for generating a single ordual-band UWB signal, according to a preferred embodiment of the presentinvention. As shown in FIG. 10, the signal generating circuit includesan I/Q oscillator 1005, a lookup table 1010 first and second DACcircuits 1012 and 1014, a vector modulator 1020, a clocking signalgenerator 1025, first and second bit sources 1030 and 1035, first andsecond wavelet code generators 1040 and 1045, a summer 1090, and aswitch 1095. It also may comprise first and second band pass filters1080 and 1085.

The first wavelet code generator 1040 further comprises a first encoder1050 and a first mixer 1070, and may comprise a first low pass filter(LPF) 1060. The second wavelet code generator 1045 further comprises asecond encoder 1055 and a second mixer 1075, and may comprise a secondLPF 1065. This embodiment of the clocking signal generator furthercomprises a xN circuit 1021, a xM₁ circuit 1022, a xM₂ circuit 1023, adivide-by-L₁ circuit 1027, and a divide-by-L₂ circuit 1028.

The I/Q oscillator 1005 produces an oscillating signal at an oscillatingfrequency. In the preferred embodiments, the I/Q oscillator comprises avoltage controlled oscillator/phase locked loop (VCO/PLL) that providesa first in-phase and quadrature phase (I/Q) signal.

In one preferred embodiment, the I/Q oscillator 1005 could comprise aVCO/PLL that feeds outputs with a 50% duty cycle into the inputs of apoly-phase filter. If the poly-phase filter is chosen to have therequired bandwidth and phase/amplitude tolerance, then it will outputthe desired I/Q signal.

In another preferred embodiment, the I/Q oscillator 1005 could comprisea VCO/PLL operating at twice the desired frequency feeds that outputs asignal with a 50% duty cycle into a pair of divide-by-2 frequencydividers that provide the desired I/Q signal.

In yet another preferred embodiment, the I/Q oscillator 1005 couldcomprise a VCO/PLL operating at four times the desired frequency feedsthat outputs a signal with any duty cycle to a divide-by-4 frequencydivider that provides the desired I/Q signal.

The lookup table (LUT) 1010 contains data necessary to create sine andcosine waves of varying phase. It is controlled by a phase controlsignal, which instructs the lookup table 1010 to output the datacorresponding the sine/cosine value for that phase. These digital sineand cosine signals are each output at one of the I and Q outputs of thelookup table 1010.

The digital sine and cosine signals are received at the first and secondDAC circuits 1012 and 1014, which convert the digital sine and cosinesignals into analog sine and cosine signals, These analog sine andcosine signals are output at the I and Q outputs of the DAC circuits1012 and 1014 as a second I/Q signal.

The vector modulator 1020 accepts the first I/Q signal from the I/Qoscillator 1005 and the second I/Q signal from the first and second DACcircuits 1012 and 1014, and produces a base clocking signal. This baseclocking signal has a base clock frequency close to the oscillatingfrequency (e.g., +/−10%), but is varied in phase and frequency based onthe value and rate of change of the second I/Q signal.

The clocking signal generator 1025 provides clocking signals to thefirst and second bit sources 1030 and 1035, and the first and secondwavelet code generators 1040 and 1045. In the disclosed embodiment, theclocking signal generator 1025 provides first and second bit rateclocks, first and second chip rate clocks, and first and second waveletcenter frequency clocks. In alternate embodiments with multiple bands,the clocking signal generator would preferably provide a bit rate clock,a chip rate clock, and a wavelet center frequency clock for each band.

The first and second bit sources 1030 and 1035 provide the first andsecond wavelet code generators with a stream of incoming bits. This canbe accomplished through the use of an incoming bit stream signal and adata latch, or any other desired means of providing data bits. The firstand second bit rate clocks instruct the first and second bit sources1030 and 1035, respectively, as to when they should cycle through bitvalues.

Each of the first and second wavelet code generators 1040 and 1045accept bit data and convert them into ultrawide bandwidth signals havingthe bit values modulated into code words. In particular, the first andsecond encoders 1050 and 1055 generate a code word that is upright orinverted based on the value of a received bit. The first and secondwavelet code generators 1040 and 1045 generate a coded sequence ofwavelets (i.e., chips) based on the first and second chip rate clocks,respectively. In a preferred embodiment a chip is an inverted ornon-inverted wavelet, or could be a null (i.e., a missing or zero)wavelet. This could be altered in other embodiments, however.

In one preferred embodiment each of the first and second encoders 1050and 1055 comprise a code word generator and a mixer, as shown byelements 205 and 210 in FIG. 2 and elements 405A, 405B, 410A, and 410Bin FIG. 5.

The first mixer 1070 and second mixers 1075 modulate the code wordsgenerated by the first and second encoders 1050 and 1055 into wavelets,each chip in the code word being represented by one or more wavelets (asdetermined the ratio of the corresponding chip rate clock and waveletcenter frequency clock.

The first and second LPFs 1060 and 1065, and the first and second BPFs1080 and 1085 serve to remove extraneous frequency elements from theprocessed signals. Preferably their parameters are determined as notedabove with respect to the filters used in the circuit of FIG. 2.

The summer 1090 adds the output of the first and second wavelet codegenerators 1040 and 1045, to provide a signal that can be broadcast inboth bands.

The switch 1095 allows the device to selectively choose whether toconnect an transmission block to the output of the first wavelet codegenerator 1040 (i.e., the first band alone), to the output of the secondwavelet code generator 1045 (i.e., the second band alone), or to theoutput of the summer 1090 (i.e., the first and second bands combined.)

In the embodiment disclosed in FIG. 10, the clocking signal generator1025 provides the various clocking signals as follows. The output of thevector modulator 1020 (i.e., the base frequency) is provided unalteredas a first chip rate clock, while the base frequency is passed throughthe xN circuit 1021 to provide a second chip rate clock that has afrequency of N times the first chip rate clock.

The base frequency is passed through the divide-by-L₁ circuit 1027 toprovide the first bit rate clock, while the output of the xN circuit1021 is provided to the divide-by-L₂ circuit 1028 to provide the secondbit rate clock. Thus, the first bit rate clock is equal to the firstchip rate clock divided by L₁, while the second bit rate clock is equalto the second chip rate clock divided by L₂.

Finally, the base frequency is passed through the xM₁ circuit 1023 toprovide the first wavelet center frequency clock, while the output ofthe xN circuit 1021 is provided to the xM₂ circuit 1023 to provide thesecond wavelet center frequency clock. Thus, the first wavelet centerfrequency clock is equal to the first chip rate clock multiplied by M₁,while the second wavelet center frequency clock is equal to the secondchip rate clock multiplied by M₂.

In this embodiment, L₁ is the length of the code word set used by thefirst band; L₂ is the length of the code word set used by the secondband; N is the ratio between the center frequencies of the first andsecond bands; M₁ is the number of cycles in a wavelet in the first band;and M₂ is the number of cycles in a wavelet in the first band.

In alternate embodiments the clocking signal generator 1025 could beimplemented differently. For example, in one alternate embodiment, theoutput of the vector modulator 1020 (i.e., the base frequency) isprovided unaltered as a second wavelet center frequency clock, while thebase frequency is passed through a divide-by-N circuit to provide afirst wavelet center frequency clock that has a frequency of 1/N timesthe second wavelet center frequency clock. The base frequency is passedthrough the divide-by-M₂ circuit to provide the second chip rate clock,while the output of the divide-by-N circuit is provided to adivide-by-M₁ circuit to provide the first chip rate clock. Finally, theoutput of the divide-by-M₂ circuit is provided to a divide-by-L2 circuitto provide the second bit rate clock, while the output of the xN circuitis provided to the divide-by-L₁ circuit to provide the first bit rateclock. In this embodiment, the parameters for L₁, L₂, N, M₁, and M₂ arethe same as in the embodiment of FIG. 10.

In another alternate embodiment, the output of the vector modulator 1020(i.e., the base frequency) is provided unaltered as a first chip rateclock, is passed through a divide-by-L₁ circuit to provide the first bitrate clock, and is provided to a xM₁ circuit to provide the firstwavelet center frequency clock. The output of the xM₁ circuit is thenprovided to a xN circuit to provide the wavelet center frequency clock;the output of the xN circuit is provided to a divide-by-M₂ circuit toprovide the second chip rate clock, and the output of the divide-by-M₂circuit is provided to a divide-by-L₂ circuit to provide a second bitrate clock. In this embodiment, the parameters for L₁, L₂, N, M₁, and M₂are the same as in the embodiment of FIG. 10.

In yet another alternate embodiment, the output of the vector modulator1020 (i.e., the base frequency) is provided unaltered as a first waveletcenter frequency clock, is passed through a divide-by-L₁ circuit toprovide the first bit rate clock, and is provided to a xM₁ circuit toprovide the first wavelet center frequency clock. The output of the xM₁circuit is then provided to a xN circuit to provide the wavelet centerfrequency clock; the output of the xN circuit is provided to adivide-by-M₂ circuit to provide the second chip rate clock, and theoutput of the divide-by-M₂ circuit is provided to a divide-by-L₂ circuitto provide a second bit rate clock. In this embodiment, the parametersfor L₁, L₂, N, M₁, and M₂ are the same as in the embodiment of FIG. 10.

In alternate embodiments multiple summers or a complex multiplexer couldbe used to provide different combinations of bands. The switch 1095could then choose between this variety of available output options.Because of the common clocking source, the alignment of the wavelets inboth bands can be forced to a phase that results in the two waveletshaving a controlled orthogonality relationship.

FIG. 11 shows an alternate embodiment of the wavelet code generator pathaccording to a preferred embodiment of the present invention. A shown inFIG. 11, a T-flip-flop 1110, a D-flip-flop 1120, and a whitening mixer1130 can be added to a regular wavelet code generator path to provide analternate wavelet encoder.

In this embodiment the T-flip-flop 1110 and the D-flip-flop 1120 areprovided in series. Since data is random, uncorrelated, and zero mean,when it is fed forward into the whitening mixer 1130 (placed between themixer 1070, 1075 and the band pass filter 1080, 1085 any spurious tonesleft in the normal encoder will be whitened by the whitening mixer 1130.For example, if the first or second wavelet center frequency clockleaked through the mixer 1070, 1075 and spread into the data stream, thewhitening mixer would remove it.

In addition, alternate embodiments can use a variety of methods toincrease the data rate of a UWB transmission. Some embodiments could mapmultiple bits per symbol (i.e., P can be greater than 1), which mayrequire QPSK waveform modulation for high values of P. Other embodimentsmay use shorter code word lengths, which may require forward errorcorrection.

Spectral Modes of Operation

The circuit shown in FIG. 5 provides three spectral modes of operation:a low band mode, a high band mode, and a dual-band mode. In the low bandmode the device operates only using the low band 610; in the high bandmode the device operates only using the high band 710; and in thedual-band mode the device operates using both the low band 610 and thehigh band 710.

If the low band mode is used, the device is limited to a lower datarate, but enjoys a greater range than the high band mode. This isbecause of the inherent relationship between data rate and range whenall else is constant. Similarly, if the high band mode is used, it canachieve a higher data rate but with a shorter range than the low bandmode. And if the dual-band is used a higher data rate than either thelow band or the high band mode can be achieved, but the device will belimited to the range of the high band.

Using only the low band mode or only the high band mode also offers theadvantage of allowing adjacent networks to engage in frequency divisionmultiplexing. This can be used in place of or in addition to a codedivision multiplexing scheme based on the use of different code words.

FIG. 9 is a diagram showing a multiple network design using bothfrequency division multiplexing and code division multiplexing,according to a preferred embodiment of the present invention. As shownin FIG. 9, a plurality of wireless networks 620A, 620B, 620C, 620D,630A, 630B, and 630C are set up adjacent to each other in a number ofnearby rooms 610. In this embodiment there are two bands (high and low)and four sets of code words to choose from. Therefore, there are eightdifferent band-code combinations that can be used.

Adding the ability to change between two bands doubles the number ofoptions available to a network for inter-network interference avoidance.This flexibility can be further increased if more than two bands areused.

Using the dual-band mode can also provide certain unique advantages. Forexample, it is possible using the dual-band mode to have true duplexcommunication. With an appropriate diplexer, one transceiver cantransmit on one of the bands (high or low), while the other transceivertransmits on the other band.

In addition, forward error correction (FEC) can be used in alternateembodiments. FEC will add complexity, but increase data rate. Thus,these alternate embodiments can trade off the concerns of performanceand cost/complexity to implement a desired level of FEC.

It is important to note that in the circuits shown in FIGS. 2 and 5, thecenter frequency and bandwidth of each of the bands can be changed inalternate embodiments. This gives a tremendous amount of flexibility forthese circuit designs to adapt to changing circumstances such as changesin the available spectral allocations. The response of these circuitscan be changed by altering one reference frequency clock and a band passfilter for each band.

If the available spectral allocation were reduced, the circuits of FIGS.2 and 5 could be easily modified to avoid any newly-forbiddenfrequencies. For example, if spectral protection were provided for therange of 4.9-5.0 GHz, the circuit of FIG. 5 could be modified such thatthe low band 610 would avoid these frequencies.

Likewise, if the available spectral allocation were increased, thecircuits of FIGS. 2 and 5 could be easily modified to take advantage ofany newly-available frequencies.

Furthermore, although only a single band and dual-band embodiments aredisclosed, multi-band modes using higher numbers of bands are possible.To use additional bands, alternate embodiments can add additional copiesof the circuitry of FIG. 2 and adjust the various parameters of thecircuit to achieve the desired frequency response. In these embodimentsa single reference frequency generator can be provided for all of thebands to use.

However, despite the fact that all of the disclosed preferredembodiments employ a single reference frequency generator forsimplicity, alternate embodiments could use multiple frequencygenerators.

This disclosure is intended to explain how to fashion and use variousembodiments in accordance with the invention rather than to limit thetrue, intended, and fair scope and spirit thereof. The foregoingdescription is not intended to be exhaustive or to limit the inventionto the precise form disclosed. Modifications or variations are possiblein light of the above teachings. The embodiment(s) was chosen anddescribed to provide the best illustration of the principles of theinvention and its practical application, and to enable one of ordinaryskill in the art to utilize the invention in various embodiments andwith various modifications as are suited to the particular usecontemplated. All such modifications and variations are within the scopeof the invention as determined by the appended claims, as may be amendedduring the pendency of this application for patent, and all equivalentsthereof, when interpreted in accordance with the breadth to which theyare fairly, legally, and equitably entitled.

1. A method for generating a multiple band ultrawide bandwidth signal,comprising: providing a first reference signal having a first referencefrequency; multiplying the first reference signal by M to generate asecond reference signal having a second reference frequency that is Mtimes the first reference frequency; selecting one of the firstreference signal and the second reference signal as a selected referencesignal having a selected reference frequency; dividing the selectedreference signal by L to generate a bit rate clock; receiving aplurality of data bits based on the bit rate clock; and generating anultrawide bandwidth signal at a transmitter circuit based on theselected reference signal and one of the plurality of data bits, theultrawide bandwidth signal including two or more pulses having theselected reference frequency, wherein M is an integer greater than 1,and wherein L is an integer greater than
 1. 2. A method for generating amultiple band ultrawide bandwidth signal, as recited in claim 1, whereinthe first reference frequency is one of between 300 MHz and 9.2 GHz. 3.A method for generating a multiple band ultrawide bandwidth signal, asrecited in claim 1, further comprising: multiplying the first referencesignal by K₃ to K_(N) to generate third through N^(th) referencesignals, having third through N^(th) reference frequencies,respectively, wherein the third through N^(th) reference frequencies areequal to K₃ through K_(N) times the first reference frequency,respectively, wherein the operation of selecting one of the firstreference signal and the second reference signal as a selected referencesignal, further comprises selecting one of the first through N^(th)reference signals as the selected reference signal, wherein K₃ to K_(N)are all integers greater than 1, wherein M and K₃ to K_(N) are alldifferent integers, and wherein N is an integer greater than three.
 4. Amethod for generating a multiple band ultrawide bandwidth signal, asrecited in claim 1, wherein the first and second reference signals areboth derived from a third reference signal.
 5. A method for generating amultiple band ultrawide bandwidth signal, as recited in claim 1, a firstultrawide bandwidth signal generated when the first reference signal isselected and a second ultrawide bandwidth signal generated when thesecond reference signal is selected, wherein the first ultrawidebandwidth signal and the second ultrawide bandwidth signal are encodedusing a same code word.
 6. A method for generating a multiple bandultrawide bandwidth signal, as recited in claim 1, a first ultrawidebandwidth signal generated when the first reference signal is selectedand a second ultrawide bandwidth signal generated when the secondreference signal is selected, wherein the first ultrawide bandwidthsignal and the second ultrawide bandwidth signal are encoded usingdifferent code words.
 7. A method for generating a multiple bandultrawide bandwidth signal, as recited in claim 1, executed in anintegrated circuit.
 8. A method for generating a multiple band ultrawidebandwidth signal, as recited in claim 1, executed in an ultrawidebandwidth transceiver.
 9. A device for transmitting ultrawide bandwidthsignals, comprising: a first reference frequency generator configured togenerate a first reference signal having a first reference frequency; asecond reference frequency generator configured to generate a secondreference signal having a second reference frequency that is differentfrom the first reference frequency; a selection circuit configured toselect one of the first reference signal and the second reference signalas a selected reference signal; a bit rate clock generator configured todivide the selected reference signal by L to generate a bit rate clockhaving a bit rate frequency; a bit source configured to generate a bitstream based on the bit rate clock and a plurality of bits; a waveletcode generator configured to generate an ultrawide bandwidth signalbased on the bit stream and the selected reference signal; and anantenna configured to transmit the ultrawide bandwidth signal generatedby the wavelet code generator, wherein L is an integer greater than 1.10. A device for transmitting ultrawide bandwidth signals, as recited inclaim 9, wherein the second reference signal is derived from the firstreference signal.
 11. A device for transmitting ultrawide bandwidthsignals, as recited in claim 9, wherein the first reference signal ismultiplied by N to provide the second reference signal, where N is aninteger greater than
 1. 12. A device for transmitting ultrawidebandwidth signals, as recited in claim 9, wherein the first referencefrequency is between 300 MHz and 9.2 GHz.
 13. A device for transmittingultrawide bandwidth signals, as recited in claim 9, further comprising:a third reference frequency generator configured to generate a thirdreference signal having a third reference frequency that is differentfrom the first and second reference frequencies, wherein the selectioncircuit configured to select one of the first reference signal, thesecond reference signal, and the third reference signal as a selectedreference signal.
 14. A device for transmitting ultrawide bandwidthsignals, as recited in claim 9, further comprising: third through Nthreference frequency generators configured to generate third through Nthreference signals, respectively, the third through Nth reference signalshaving third through Nth reference frequencies, wherein all of the thirdthrough Nth reference frequencies are different from each other, andwherein the selection circuit is configured to select one of the firstreference signal, the second reference signal, and the third through Nthreference signals as a selected reference signal.
 15. A method forgenerating an ultrawide bandwidth signal, comprising: providing a firstreference signal having a first reference frequency; providing a secondreference signal based on the first reference frequency having a secondreference frequency that is different from the first referencefrequency; selectively generating one of a first ultrawide bandwidthsignal at a transmitter circuit based on the first reference signal, asecond ultrawide bandwidth signal at the transmitter circuit based onthe second reference signal, and a summation of both the first ultrawidebandwidth signal and the second ultrawide bandwidth signal at thetransmitter circuit.
 16. A method for generating a multiple bandultrawide bandwidth signal, as recited in claim 1, further comprising:multiplying the selected reference signal by N to generate a waveletcenter frequency clock, wherein the wavelet center frequency clock setsa center frequency for the ultrawide bandwidth signal, and wherein N isan integer greater than
 1. 17. A method for generating a multiple bandultrawide bandwidth signal, as recited in claim 16, wherein thegenerating of the ultrawide bandwidth signal further comprises:generating a code word based on the one of the plurality of data bitsand the selected reference signal, and modulating the code word based onthe wavelet center frequency clock into a wavelet for the ultrawidebandwidth signal, the wavelet including the two or more pulses.
 18. Adevice for transmitting ultrawide bandwidth signals, as recited in claim9, further comprising: a wavelet center frequency generator configuredto multiply the selected reference signal by M to generate a waveletcenter frequency clock, wherein the wavelet center frequency clock setsa center frequency for the ultrawide bandwidth signal, and wherein M isan integer greater than
 1. 19. A device for transmitting ultrawidebandwidth signals, as recited in claim 18, wherein the wavelet codegenerator further comprises: an encoder configured to generate a codeword based on the bit stream and the selected reference signal, and amixer configured to modulate the code word generated by the encoderbased on the wavelet center frequency clock into a wavelet for theultrawide bandwidth signal.
 20. A method for generating a multiple bandultrawide bandwidth signal, as recited in claim 15, further comprising:multiplying the first reference signal by M1 to generate a first waveletcenter frequency clock; and multiplying the second reference signal byM2 to generate a second wavelet center frequency clock, wherein thefirst wavelet center frequency clock sets a first center frequency forthe first ultrawide bandwidth signal, and wherein the second waveletcenter frequency clock sets a second center frequency for the secondultrawide bandwidth signal, and wherein M1 and M2 are both integersgreater than
 1. 21. A method for generating a multiple band ultrawidebandwidth signal, as recited in claim 20, further comprising: dividingthe first reference signal by L1 to generate a first bit rate clock;dividing the second reference signal by L2 to generate a second bit rateclock; receiving a first bit stream based on the first bit rate clock;and receiving a second bit stream based on the second bit rate clock,wherein L1 and L2 are each integers greater than
 1. 22. A method forgenerating a multiple band ultrawide bandwidth signal, as recited inclaim 21, wherein the first ultrawide bandwidth signal is generated by:generating a first code word based on the first bit stream and the firstreference signal, and modulating the first code word based on the firstwavelet center frequency clock into a first wavelet for the firstultrawide bandwidth signal, and wherein the second ultrawide bandwidthsignal is generated by: generating a second code word based on thesecond bit stream and the second reference signal, and modulating thesecond code word based on the second wavelet center frequency clock intoa second wavelet for the second ultrawide bandwidth signal.